We will adopt the convention that the term "program" defines a stream of both instructions and data that a user can request an operating system to transfer, link, and execute. An "executable" program in memory is called an "image". The (hardware) context in which an image is executed is called a "process" and the term "process" thus characterizes the complete unit of execution in the computer system.
A context (or process) switch operation can be understood to occur in a multiprogramming environment where several processes (individual streams of code) are ready for execution at any one time. The term "process switch operation" thus refers to the procedure for reassigning the processor from a currently running process to a successor process.
In order to achieve a high performance system, a processor has to be structured to enable the operating system to switch execution rapidly between individual processes. Since a process is a stream of instructions and data defined by a hardware context, each process has a unique identification in the computer system, the stream of code being executed at any instant being determined by its hardware context. The term "hardware context" refers to the information loaded in the processor's registers that identifies, where the stream of instructions and data are located, which instruction to execute next, and what the processor status is during execution. In an illustrative prior art system (Digital Equipment Corporation VAX-11 computer) the computer's operating system switches between processes by requesting the processor to save one process hardware context and load another via a specific set of instructions.
In a microprocessor, process switch operations are controlled on-chip. Specifically, a microprocessor typically includes one or more programmed logic arrays (PLAs) each with word lines along which a pattern of transistors are defined in a manner determinative of output codes operative to control various other elements of the microprocessor. The pattern of transistors along each word line is called "microcode", the totality of microcode lines defined by a PLA being referred to as a "microprogram". Each word line, specifically, defines a particular set of output bits representative of a line of microcode. Sequences of microcode instructions are generated at the output register of the PLA and applied to various registers, inter alia, to control data flow and processing on the chip, often responsive to a single instruction at the input to the PLA.
An input instruction to a PLA is referred to as an "opcode", a sequence of such instructions being referred to as "macrocode". It is common during operation for instructions to be introduced to the chip from a memory which is external to the chip. Such instructions often are latched in an on-chip instruction register for processing under the control of the PLA. A "process switch operation", in this context, is controlled by a sequence of microcode instructions generated at the output register of a PLA.
When a process switch operation occurs in a prior art system, the processor operates in two phases: the first phase is to save (store) the current state of the interrupted process for resumption at a later time. The second phase is to set up (restore) the new state for the successor process. At the conclusion of the successor process, the processor operates to re-establish the state of the previous (or some other) process.
The steps carried out in response to a process switch command in prior art systems are summarized in Table I as follows:
TABLE I ______________________________________ 1. save SP, PC, and PSW registers of current STORE process 2. save general purpose registers of current process 3. set up SP, PC and PSW registers for new RESTORE process 4. set up general purpose registers for new process ______________________________________
where "SP" stands for stack pointer, "PC" stands for program counter, and "PSW" stands for process status word. The problem which this invention addresses is that an excessive amount of processor time is spent on the overhead associated with managing a plurality of processes in general and on process switch operations in particular. The need to shorten that time is particularly apparent for multiuser timesharing computer systems where noticeable waiting periods are encountered by users, due to the time the processor spends on process switches.